This invention claims priority from Japanese Patent Application Number JP2006-227042 filed on Aug. 23, 2006, the content of which is incorporated herein by reference in its entirety.
1. Field of the Invention
The present invention relates to an insulated gate semiconductor device, and more particularly relates to an insulated gate semiconductor device which enables a bidirectional switching operation in one chip by separating an electrode connected to a back gate region from a source electrode.
2. Description of the Related Art
FIGS. 10A and 10B show an n-channel MOSFET as an example of a conventional semiconductor device. FIG. 10A is a plan view and FIG. 10B is a cross-sectional view along the line e-e in FIG. 10A. Note that, in FIG. 10A, an interlayer insulating film is omitted and a source electrode is indicated by a broken line.
As shown in FIG. 10A, trenches 44 are formed in a stripe pattern on a surface of a substrate, and source regions 48 and body regions 49 are disposed adjacent to the trenches 44. The trenches 44, the source regions 48 and the body regions 49 are extended in the same direction.
As shown in FIG. 10B, in the n-channel MOSFET, a drain region 42 formed of an n− type epitaxial layer is provided on an n+ type semiconductor substrate 41, and a p type channel layer 43 is provided thereon. Moreover, the trenches 44 are provided, which reach the drain region 42 from the channel layer 43. An inner wall of each of the trenches 44 is covered with a gate oxide film 45, and a gate electrode 46 is buried in the trench 44.
In a surface of the channel layer 43 adjacent to the trenches 44, n+ type source regions 48 are formed. Moreover, in the surface of the channel layer 43 between the source regions 48 in two adjacent cells, a p+ type body region 49 is formed. The trenches 44 are covered with an interlayer insulating film 50, and a source electrode 51 is provided thereon, which comes into contact with the source regions 48 and the body regions 49. The source electrode 51 is continuously provided on the source regions 48 and the body regions 49. Moreover, a drain electrode 52 is provided on a rear surface of the substrate.
The MOSFET described above is adopted in a protection circuit device which manages charge and discharge of a secondary battery, for example.
FIG. 11 is a circuit diagram showing an example of the protection circuit device.
Two MOSFETs Q1 and Q2 are series-connected to a secondary battery LiB. The MOSFETs Q1 and Q2 have a common-connected drain D. Moreover, respective sources S thereof are disposed on both ends, and respective gates G thereof are connected to a control circuit IC. The control circuit IC protects the secondary battery LiB from overcharge, overdischarge or load short-circuiting by controlling turning on and off of the two MOSFETs Q1 and Q2 while detecting a voltage of the secondary battery LiB. This technology is described, for instance, in Japanese Patent Application Publication No. 2002-118258.
For example, the control circuit IC prevents overcharge of the secondary battery LiB by detecting the voltage of the battery and switching off the MOSFET Q2 when the detected voltage is higher than a maximum set voltage. Moreover, the control circuit IC prevents overdischarge of the secondary battery LiB by switching off the MOSFET Q1 when the detected voltage is lower than a minimum set voltage.
As shown in FIGS. 10A and 10B, in the conventional MOSFET, the body regions 49 and the source regions 48 are common-connected to the source electrode 51, and potentials thereof are fixed. Moreover, in the case where the MOSFET is to be utilized as a bidirectional switching element, two MOSFETs are series-connected and current paths are formed in both directions by switching potentials of the respective source electrodes 51 thereof.
This is because the MOSFET includes a parasitic diode. Specifically, in the MOSFET in which the potentials of the body region 49 (in other words, a back gate region) and the source region 48 are fixed, a forward operation of the parasitic diode in an off state is inevitable.
Therefore, it is necessary to perform control so as not to allow the parasitic diode to form an unwanted current path when the MOSFET is off.
Thus, as shown in FIG. 11, the two MOSFETs having the same number of cells and the same chip size are series-connected, and the MOSFETs Q1 and Q2 and parasitic diodes thereof are controlled by the control circuit. Accordingly, desired current paths are formed.
Meanwhile, in order to reduce an on-resistance in the MOSFET, a certain number of cells and a certain chip size are required. In the meantime, the secondary battery has become widely used as a battery of a portable terminal. Moreover, along with miniaturization of the portable terminal, there has also been an increasing demand for miniaturization of a protection circuit. However, the above protection circuit having the two series-connected MOSFETs Q1 and Q2 has its limits in meeting the demand.